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Thread: Need help minimizing the logic statement of a logic circuit

  1. #1
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    Need help minimizing the logic statement of a logic circuit

    I am working on a two-part question in which I am supposed to find the logic statement of the logic circuit shown below (which I have already done), and then minimize the statement in order to remove redundant terms. I am fairly certain that I got the statement correct, but I have no idea how to minimize it; this is due to me not knowing how to properly use logical equivalences. Is there anyone who can assist me in minimizing my statement for the circuit?


    Need help minimizing the logic statement of a logic circuit-logic-circuit.jpg

    My statement for the above circuit: [ (A ∧ B) (B ∧ C) ] ∧ [ (C v D) v (B ∧ C) ]
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    Re: Need help minimizing the logic statement of a logic circuit

    Have they not taught you about Karnaugh maps?

    https://en.wikipedia.org/wiki/Karnaugh_map
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    Re: Need help minimizing the logic statement of a logic circuit

    I had never heard of the term "Karnaugh map" until you mentioned it just now, so, unfortunately, I cannot say that I am familiar with that method of minimization.
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    Re: Need help minimizing the logic statement of a logic circuit

    Quote Originally Posted by ProtoflareX View Post
    I had never heard of the term "Karnaugh map" until you mentioned it just now, so, unfortunately, I cannot say that I am familiar with that method of minimization.
    are you in a digital logic class? How can they not teach you this method??? I mean I know that software does it all now but still...

    Has the prof given any indication on how to systematically reduce circuits like this?
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    Re: Need help minimizing the logic statement of a logic circuit

    Quote Originally Posted by romsek View Post
    are you in a digital logic class? How can they not teach you this method??? I mean I know that software does it all now but still...

    Has the prof given any indication on how to systematically reduce circuits like this?
    I am in a typical discrete math course. We are intended to use the document displayed below to minimize the statement. However, I am not quite sure how to read/use it...


    Need help minimizing the logic statement of a logic circuit-logical-equivalences.png
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    Re: Need help minimizing the logic statement of a logic circuit

    Quote Originally Posted by ProtoflareX View Post
    I am not quite sure how to read/use it...


    Click image for larger version. 

Name:	Logical Equivalences.png 
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    ok.. those are two very different things.

    You should be able to understand these sheets w/o any confusion whatsoever.

    Applying it to minimize circuits is another thing entirely and without some system like a Karnaugh map it becomes an "art" of recognizing expressions that can be minimized.

    This is as complicated a circuit as I would ever attempt without using a systematic approach.

    I'm going to change your notation a bit and write your expression as

    $(AB)(\overline{BC})\left(\overline{BC}+\overline{ C+D}\right)$

    looking at the rightmost term

    $\left(\overline{BC}+\overline{C+D}\right) = \overline{B}+\overline{C} + \overline{C}~\overline{D} = \overline{B} + \overline{C}$

    now expand the middle term

    $\overline{BC} = \overline{B}+\overline{C}$

    and

    $( \overline{B}+\overline{C} ) (\overline{B} + \overline{C} ) = \overline{B}+\overline{C}$

    now bringing the leftmost term in we have

    $(AB)(\overline{B}+\overline{C}) = A B \overline{B} + A B \overline{C} = A B \overline{C}$

    and so the final expression is

    $A B \overline{C}$

    see what I mean about it being an art?
    Last edited by romsek; Oct 8th 2016 at 12:24 PM.
    Thanks from ProtoflareX
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    Re: Need help minimizing the logic statement of a logic circuit

    I believe I have a better understanding of this now. Thank you for your assistance.
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