Hey RogerSmith.
NAND and OR gates are not equivalent. Are you thinking of a combination of NAND gates to produce an OR or a NOR gate (which is commonly done)?
We have to prove that a combination of 3 NAND gates is logically equivalent to an OR gate by using a truth table. I thought this one was going to be easy but maybe I'm overthinking it a bit. I feel like I may have proved it's equal to a NOR instead of an OR. Can somebody check over this for me? From reading up on NAND gates I can see that it's just the reverse order of an OR gate (i.e if OR = 0,1,1,1 then NAND = 1,1,1,0).Assume there are 2 inputs, and we run them through 2 seperate NAND gates and then run those two outputs to a final NAND gate(3 total NAND gates).
x y x OR y ~x ~y (x AND y) ~(x AND y) (~x OR ~y) 0 0 0 1 1 0 1 1 0 1 1 1 0 0 1 1 1 0 1 0 1 0 1 1 1 1 1 0 0 1 0 0
Is this correct? The thing that was jumbling me up is that I was unsure of things like "is NAND written as ~(A ^ B) or (~A ^ ~ B)". Did I just prove it was equal to a NOR gate instead of an OR?
Right, and the same thing applies for y, but when I get to the 3rd and final NAND gate and pass ~x as 1 parameter and ~y as the other parameter, the result should be x AND y right? But how will that affect the truth table? Like will that help me prove that combination of NAND gates is equal to an OR value from my truth table?
**EDIT***
Ohhh I think I get what you're saying now. so if i do ~(~x and ~y), which I think is the same thing as passing the two parameters over to the last NAND gate, my results should come out to be the value of (x OR y)